Develop firmware on programmable ASIC chips, make full use of the hardware resource to complete deep learning tasks.
Develop and debug CNN processor’s driver/API/protocol design in Linux environment.
Practical experience in one of the following complicated algorithms domains: Deep Learning/Machine Learning, Graphics algorithms/Video codec algorithms/data mining etc.
GPU(CUDA/OpenCL etc.) or other parallel programming experience.
Have the basic knowledge of compute architecture and basic knowledge of software-hardware co-design.
Technical proficiency in programming languages: C/C++, Python of Matlab, familiarity with Linux environment.
Machine Learning Expert and System Architect
Develop new processor cores implementing machine learning DL/ML algorithms, focusing on applications such as, driver-less cars, robotics, compute vision, data mining etc.
Take such processor core from architecture to implementation with corresponding verification and validation work.
Architecture planning from the API framework/Libs or Firmwares to chip hardware engine with a Top-down system view.
Evaluate and compare different DL/ML algorithms for specific applications and related tasks, in particular with regard to the performance, training, and suitability for embedded applications;
Close communication with other chip or hardware/software architecture experts.
Master in computer science, artificial intelligence, mathematics, physics and statistics.
Expertise and practical experience in the following domains: Artificial Intelligence, Deep Learning, Machine Learning. Practical experience in CNN/RNN algorithm is a plus.
In-depth practice in deep learning implementation on GPU/FPGA/ASIC, such as Caffe, ConvNet, Torch…etc., mastering the tuning strategy for CNN/RNN's parameters.
Good Knowledge in chip and RTL development using Verilog or other HDL.
Technical proficiency in programming languages: C/C++, Python, or Matlab, Java, familiarity with Linux environment.
Experience with big data technologies and HPC is a plus.
Excellent communicative skills in read and written English, fluent spoken English.
Strong communication skills, ability to express oneself logically, strong sense.
Senior CPU Digital Design / Verification Engineer
Interact with the Chief architect and SoC architect, software teams and ASIC product development teams to define the micro-architecture of the Multi-thread Processor core including memory hierarchy and various interconnects
Evaluate and perform trade off analysis of hardware implementation between performance, cost and power.
Define verification and validation strategies at different levels for the processor core and carry out the related work to ensure functional correctness
Minimum of 5 years of proven design or verification experience in complex processor projects
Experience with Multi-Core, multi-threaded processors architecture/design/verification
Experience with designs of complex high speed RTL modules, or Experience with constrained random and formal verification
Experience with the design/verification in one or more of the following disciplines
Multi-level cache hierarchy
Instruction fetch and dispatch unit
Load Store Unit
Execution, Integer and Floating Point Unit
Memory Management Unit
Interrupts and Exception Handling
Processor Core Virtualization
Good understanding of computer system architecture, memory systems or cache coherency
Good understanding of ARM instruction set
Good understanding high speed circuit and low power design is a plus
Good understanding of TCP/IP networking/service packet protocols is a plus
Must be a highly organized, detail-oriented self-starter, who works well independently, as well as in a team environment
BS or higher degree in Electrical/Computer Engineering with experience in ASIC design/ verification
Good verbal and written communication skills
Candidates with less experience will be considered as Processor Development Engineer
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